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UID:pretalx-coscup-2026-KEJ9LU@pretalx.coscup.org
DTSTART;TZID=CST:20260809T101000
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DESCRIPTION:The open-source chip design movement has long been limited by f
 ragmented EDA tools and a lack of access to mainstream process nodes. In t
 his talk\, we present ECOS Studio\, an integrated RTL-to-chip solution tha
 t combines an open-source EDA toolchain (ECC)\, an open IP library\, and t
 he newly released ICsprout 55nm open PDK. This end-to-end flow automates s
 upply‑chain complexities so that users can focus on RTL design and recei
 ve functional silicon. We will share recent tape-out experiences\, includi
 ng the successful fabrication of a RISC‑V SoC (RetroSoC) on the 55nm pro
 cess at 100 MHz\, as well as a Multi-Project Chip aggregation scheme that 
 shares the SoC environment across designs to lower per-design cost. We wil
 l also discuss how ECOS Studio is being deployed in the “One Student One
  Chip” education initiative\, providing a zero‑configuration EDA envir
 onment to students. The talk demonstrates how the convergence of open EDA\
 , open IP\, and open PDK is bringing us closer to a future where silicon d
 esign is as ubiquitous as software.\n\nRepo links for ECOS Studio: https:/
 /github.com/openecos-projects/ecos-studio\nECC: https://github.com/openeco
 s-projects/ecc\nICS55 PDK: https://github.com/openecos-projects/icsprout55
 -pdk\nretroSoC: https://github.com/retroSoC/retroSoC
DTSTAMP:20260827T134456Z
LOCATION:TR515
SUMMARY:ECOS Studio: An RTL-to-Chip Silicon Design Solution with Open-Sourc
 e EDA\, IP\, and PDK - 王昊
URL:https://pretalx.coscup.org/coscup-2026/talk/KEJ9LU/
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