2023-07-30, 15:25–15:55 (Asia/Taipei), TR 412-1
Language: English
Successful open-source software inspires many technologies. Young engineers or students will learn many things from existing REAL designs.
Unlike open-source software, VLSI design tasks are usually covered by NDA from fabrication companies and EDA tool vendors. It will prevent students to learn from existing designs.
We wanted to change the situation. For educational purposes, we are trying to establish open VLSI fabrication methodologies. The methods are based on scalable cell libraries and scalable layout rules.
With our method, we have made VLSI chips with several fabrication processes which will not require NDA from the designing students. These chips use legacy technologies such as 2-micron, 1.2-micron, 600nm, 350nm, and 180nm. But we believe that adaptations to other finer technologies will not be difficult and the method will contribute to the students and startups to learn faster from existing designs and challenge their own new ideas on VLSI.
Beginner
Target Audience –Anyone who are interested in VLSI design
Doctorate Degree:
March 1994, Doctor of Engineering, Sophia University, Japan
Education:
April 1991 to March 1994 Doctor of Science and Engineering, Sophia University, Post Graduate School of Electrical and Electronics Engineering
April 1983 to March 1985 Master of Science and Engineering, Sophia University, Graduate School of Electrical and Electronics Engineering
April 1979 to March 1983 Bachelor of Science and Engineering, Sophia University, Electrical and Electronics Engineering
Work Experience and Position:
April 1995 to Present Tokai University
April 1985 - March 1995 Hitachi Ltd. Co. Enterprise Computer Division.
November 2003 to Present CEO of IP ARCH, Inc. USA
January 2010 to Present CTO of Overtone Corp. Japan