Jean-Paul.Chaput@lip6.fr
Jean-Paul Chaput holds a Master Degree in MicroElectronics and
Software Engineering. He joined the LIP6 laboratory within Sorbonne
Université or SU (formerly UPMC) in 2000. Currently he is a Research
Engineer in the Analog and Mixed Signal Team at LIP6. His main focus
is on physical level design software. He is a key contributor in
developing and maintaining the Alliance/Coriolis VLSI CAD projects for
CMOS technologies. In particular he contributed in developing the
routers of both Alliance/Coriolis and the whole Coriolis toolchain
infrastructure. He his now a key contributor in extending
Alliance/Coriolis to support advanced nodes and to the Analog
Mixed-Signal integration.
Sessions
Starting in 1990, Sorbonne Université-CNRS/LIP6 developped Alliance, a
complete VLSI CAD toolchain released under GPL. In this spirit, we
are assembling an upgraded design flow for ASICs based on FOSS tools
like GHDL & Yosys for logical synthesis and Coriolis for physical
design. We will present the flow with a focus on the Cotiolis part and
some of the designs we made. This should be an important milestone
toward the creation of an open hardware community.